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  • SN74LVC74AMPWREP

SN74LVC74AMPWREP

2V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC74AMPWREP
  • Package: 14-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 369
  • Description: 2V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 6 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-TSSOP (0.173, 4.40mm Width)
Number of Pins 14
Weight 57.209338mg
Operating Temperature -55°C~125°C TA
Packaging Tape & Reel (TR)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 2V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.7V
Base Part Number 74LVC74
Function Set(Preset) and Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2V
Number of Circuits 2
Load Capacitance 50pF
Output Current 24mA
Clock Frequency 100MHz
Propagation Delay 6 ns
Turn On Delay Time 1 ns
Family LVC/LCX/Z
Logic Function AND, D-Type
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 5.2ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5.4 ns
Trigger Type Positive Edge
Input Capacitance 5pF
Number of Output Lines 1
Clock Edge Trigger Type Positive Edge
Height 1.2mm
Length 5mm
Width 4.4mm
Thickness 1mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC74AMPWREP Overview


The flip flop is packaged in a case of 14-TSSOP (0.173, 4.40mm Width). The package Tape & Reel (TR)contains it. In the configuration, Differentialis used as the output. It is configured with the trigger Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~3.6V volts. Currently, the operating temperature is -55°C~125°C TA. This D latch has the type D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. You should not exceed 100MHzin the output frequency of the device. This process consumes 10μA quiescents. There are 14 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. JK flip flop belongs to 74LVC74 family. A voltage of 2.7V provides power to the D latch. A JK flip flop with a 5pFfarad input capacitance is used here. A device of this type belongs to the family of LVC/LCX/Z. Surface Mount mounts this electronic component. With its 14pins, it is designed to work with most electronic flip flops. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. A normal operating voltage (Vsup) should remain above 2V. 2 circuits are used to achieve its superior flexibility. Considering the reliability of this T flip flop, it is well suited for TR. There are 3.3V power supplies attached to it. As a result of its output current of 24mA, it is very flexible in terms of design. It is designed with 1 output lines.

SN74LVC74AMPWREP Features


Tape & Reel (TR) package
74LVC series
14 pins
3.3V power supplies

SN74LVC74AMPWREP Applications


There are a lot of Texas Instruments SN74LVC74AMPWREP Flip Flops applications.

  • 2 – Bit synchronous counter
  • Dynamic threshold performance
  • Modulo – n – counter
  • Test & Measurement
  • Functionally equivalent to the MC10/100EL29
  • ESD performance
  • Load Control
  • ESD protection
  • Latch
  • Supports Live Insertion